Transmission line and semiconductor device

ABSTRACT

A transmission line, includes: a first input electrode located in a first level; a plurality of parallel stripe-shaped signal lines in the first level, one end of the signal lines connected to the first input electrode; a first output electrode connected to another end of the signal lines, facing to the first input electrode; a second input electrode adjacent to the first input electrode in a second level facing the first level; a plurality of stripe-shaped ground lines positioned alternately in between and at outer sides of each of the signal lines in the first level, one end of the ground lines connected to the second input electrode; and a second output electrode adjacent to the first output electrode in the second level and connected to another end of the ground lines.

CROSS REFERENCE TO RELATED APPLICATIONS

[0001] This application is based upon and claims the benefit of priorityfrom prior Japanese Patent Application P2002-324021 filed on Nov. 7,2002; the entire contents of which are incorporated by reference herein.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] The present invention relates to a transmission line forhigh-speed signals in semiconductor integrated circuits, and asemiconductor device using the same.

[0004] 2. Description of the Related Art

[0005] In recent years, speeds of semiconductor integrated circuits havebeen increasing, whereby microprocessors that operate at a clock speedof several GHz and high frequency circuits operating at several GHz havebeen achieved. The prevention of a cross talk between signal lines andattention for a high frequency signal response including line inductanceare necessary for transmitting signals in a semiconductor integratedcircuit at a GHz level. A coplanar waveguide or a microstrip line is arepresentative transmission line for transmitting high frequencysignals.

[0006] An example of applying the coplanar waveguide to a clock line ina semiconductor integrated circuit has been reported (see F. Ishihara,Proceedings of ASP-DAC2000, pp.647-652, 2000).

[0007] Furthermore, the microstrip line is generally applied to aprinted board and the like. There is also an example of a structure ofthe microstrip line for reducing parasitic capacitance in asemiconductor integrated circuit (see M. Mizuno, IEEE ISSCC 2000,pp.366-367, 2002).

[0008] A line width may be increased in order to decrease the lineimpedance for ultra high-speed signal transmission. However, byincreasing the line width, a coupling effect between signal lines in theupper and lower layers relatively increases, and an effect of cross talknoise becomes a problem. Furthermore, an error may increase in the lineimpedance of additional signal lines predicted prior to wiringprocessing.

[0009] In the microstrip line, a ground plane that forms a return pathrequires a large amount of wiring resources, and may be a large obstaclefor general signal lines.

SUMMARY OF THE INVENTION

[0010] A first aspect of the present invention inheres in a transmissionline, and includes: a first input electrode located in a first level; aplurality of parallel stripe-shaped signal lines in the first level, oneend of the signal lines connected to the first input electrode; a firstoutput electrode connected to another end of the signal lines, facing tothe first input electrode; a second input electrode adjacent to thefirst input electrode in a second level facing the first level; aplurality of stripe-shaped ground lines positioned alternately inbetween and at outer sides of each of the signal lines in the firstlevel, one end of the ground lines connected to the second inputelectrode; and a second output electrode adjacent to the first outputelectrode in the second level and connected to another end of the groundlines.

[0011] A second aspect of the present invention inheres in atransmission line, and includes: a first signal line located in a firstlevel; a first ground line located in a second level facing the firstlevel, the first ground line parallel to and facing the first signalline, and having a separated section at least at one portion; and bridgeground lines located in the first level on both sides of the firstsignal line overlaying the separated section, and connected respectivelyto one separated end and another separated end of the first ground line.

[0012] A third aspect of the present invention inheres in asemiconductor device, and includes: a route line having a firstmicrostrip line configuration, being connecting a route driver cell to aroute relay buffer cell, the route driver cell receiving signals to besupplied to a terminal circuit; a route branch line having a secondmicrostrip line configuration, being branched from the route relaybuffer cell and connected to a first relay buffer cell; and a relaybranch line having a coplanar waveguide configuration, being branchedfrom the first relay buffer cell and connected to a second relay buffercell for supplying the signals to the circuit.

BRIEF DESCRIPTION OF DRAWINGS

[0013]FIG. 1 is a schematic diagram of a coplanar waveguide according toa first embodiment of the present invention;

[0014]FIGS. 2A and 2B are cross-sections of the coplanar waveguideaccording to the first embodiment of the present invention;

[0015]FIG. 3 is a schematic diagram of a microstrip line according to asecond embodiment of the present invention;

[0016]FIG. 4 is a cross-section of the microstrip line according to thesecond embodiment of the present invention;

[0017]FIG. 5 is a schematic diagram describing a transmission line in asemiconductor device according to a third embodiment of the presentinvention; and

[0018]FIG. 6 is a schematic diagram illustrating an example of thetransmission line in the semiconductor device according to the thirdembodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

[0019] Various embodiments of the present invention will be describedwith reference to the accompanying drawings. It is to be noted that thesame or similar reference numerals are applied to the same or similarparts and elements throughout the drawings, and the description of thesame or similar parts and elements will be omitted or simplified.

[0020] First Embodiment

[0021] A coplanar waveguide according to a first embodiment of thepresent invention, as shown in FIG. 1, has a plurality of stripe-shapedsignal lines 21 a through 21 d located in parallel between a pluralityof stripe-shaped ground lines 22 a through 22 e in a first level. Thesignal lines 21 a through 21 d are, for example, connected at one end toa first input electrode 23 on the left-hand side facing the page of FIG.1 and connected at another end to a first output electrode 25 on theright-hand side facing the page in the first level. The ground lines 22a through 22 e are connected at one end to a second input electrode 24,which is positioned adjacent to the first input electrode 23, and atanother end to a second output electrode 26, which is positionedadjacent to the first output electrode 25, and in contact with firstplugs 32 a through 32 e and second plugs 34 a through 34 e,respectively, in a second level that faces the first level where thesignal lines 21 a through 21 d and ground lines 22 a through 22 e arepositioned. Furthermore, first and second input terminals 27 and 28 areprovided to the first and second input electrodes 23 and 24,respectively; and first and second output terminals 29 and 30 areprovided to the first and second output electrodes 25 and 26,respectively. The first and second input terminals 27 and 28 areconnected to a circuit on a signal transmission side; and the first andsecond output terminals 29 and 30 are connected to a circuit on a signalreception side.

[0022] The structure of the coplanar waveguide according to the firstembodiment of the present invention is described using FIGS. 2A and 2B,which are cross-sections cut along the lines IIA-IIA and IIB-IIB in FIG.1, respectively. For convenience of description, a second interlayerinsulating film 15 is shown as the uppermost layer of multi-levelinterlayer insulating films provided on a semiconductor substrate 11 asshown in FIGS. 2A and 2B, however, interlayer insulating films may befurther provided on the second interlayer insulating film 15.Furthermore, the second input electrode 24 and second output electrode26 are provided on a surface of a first interlayer insulating film 13,which is an underlying layer adjacent to the second interlayerinsulating film 15. Needless to say, however, the second input electrode24 and second output electrode 26 may be provided on a surface ofanother interlayer insulating film further underlying the firstinterlayer insulating film 13, or the second input electrode 24 andsecond output electrode 26 may be provided on a surface of an interlayerinsulating film provided on an upper layer of the second interlayerinsulating film 15.

[0023] As shown in FIG. 2B, the plurality of signal lines 21 a through21 d of a line width wc and a line thickness t are alternately disposedwith the ground lines 22 a through 22 e at intervals of a gap width s ona surface of the second interlayer insulating film 15 that is depositedon the first interlayer insulating film 13. The insulating films may bea silicon oxide (SiO₂) film and the like on the semiconductor substrate11. The signal lines 21 a through 21 d are connected to the first inputelectrode 23 and first output electrode 25 at the surface of the secondinterlayer insulating film 15. On the other hand, the ground lines 22 athrough 22 e are connected to the second input electrode 24 and secondoutput electrode 26, which are provided on another surface that facesthe surface of the second interlayer insulating film 15 such as thefirst interlayer insulating film 13, so as to avoid a short circuit withthe signal lines 21 a through 21 d. For example, as shown in FIG. 2A,the ground lines 22 a through 22 e are connected to the second inputelectrode 24, which is disposed on the surface of the first interlayerinsulating film 13, via the first plugs 32 a through 32 e that areburied in contact holes provided in the second interlayer insulatingfilm 15.

[0024] In the coplanar waveguide according to the first embodiment ofthe present invention, the electromagnetic coupling between the parallelsignal lines 21 a through 21 d and ground lines 22 a through 22 ebecomes relatively stronger. Accordingly, it is possible to provide acoplanar waveguide which is substantially unaffected by noise due tocross talk from wiring layers underlying the second interlayerinsulating film 15 or wiring layers deposited on the second interlayerinsulating film 15. Furthermore, in a coplanar waveguide having threecoplanar conductors, a current flows mostly near a surface in each ofthe coplanar conductors due to a skin effect in a high frequency regionand the line resistance exponentially may increase. However, in thecoplanar waveguide according to the first embodiment of the presentinvention, since the signal lines 21 a through 21 d and ground lines 22a through 22 e are divided into a plurality of parallel transmissionlines, increases in line resistance may be avoided. Furthermore, inorder to make the most use of the advantages of the coplanar waveguideaccording to the first embodiment of the present invention and to saveas much wiring resources as possible, for the line thickness t of thesignal lines 21 a through 21 d, the line width wc of the signal lines 21a through 21 d and the ground lines 22 a through 22 e may be less thantwice the line thickness t, and the gap width s less than the linethickness t.

[0025] Second Embodiment

[0026] As shown in FIG. 3, a microstrip line according to a secondembodiment of the present invention has a first signal line 41 locatedin a first level and separated first ground lines 42 a and 42 b locatedin a second level which faces the first level. In the first level,bridge ground lines 43 a and 43 b, which are provided on both sides ofthe first signal line 41, are located such that portions of the bridgeground lines 43 a and 43 b face and overlap the first ground lines 42 aand 42 b. The bridge ground line 43 a is connected to the first groundlines 42 a and 42 b via contact with plugs 44 a, 44 b and plugs 44 e, 44f respectively, which are provided at portions of the integrated circuitthat face and overlap the first ground lines 42 a and 42 b. The bridgeground line 43 b is connected to the first ground lines 42 a and 42 bvia contact with plugs 44 c, 44 d and plugs 44 g, 44 h respectively,which are provided at portions of the integrated circuit that face andoverlap the first ground lines 42 a and 42 b. Accordingly, a firstsignal line 47, a second signal line 48 and the like can be locatedbetween the first ground lines 42 a and 42 b lying under the bridgeground lines 43 a and 43 b.

[0027] The structure of the microstrip line according to the secondembodiment of the present invention is described using FIG. 4, which isa cross-section cut along the line of IV-IV in FIG. 3. For convenienceof description, a second interlayer insulating film 15 is shown as theuppermost layer of a plurality of interlayer insulating films providedon a semiconductor substrate 11 as shown in FIG. 4. Needless to say,however, interlayer insulating films may be further provided on thesecond interlayer insulating film 15.

[0028] As shown in FIG. 4, the first signal line 41 of a line width wand the bridge ground lines 43 a and 43 b on both sides thereof arelocated on a surface of the second interlayer insulating film 15, whichis deposited on the first interlayer insulating film 13 above thesemiconductor substrate 11. The bridge ground lines 43 a and 43 b areconnected to the first ground line 42 a, which is provided on the firstinterlayer insulating film 13, in contact with the plugs 44 a, 44 b andthe plugs 44 c, 44 d respectively, which are buried in contact holesprovided in the second interlayer insulating film 15. The first signalline 41 is separated from the first ground line 42 a by an interlayerdistance h. Furthermore, the first and second signal lines 47 and 48 areprovided on the surface of the first interlayer insulating film 13.

[0029] With the microstrip line according to the second embodiment ofthe present invention, the separated first ground lines 42 a and 42 b,which face the first signal line 41 extending along the surface of thesecond interlayer insulating film 15, are connected by the bridge groundlines 43 a and 43 b, which are located on the same surface of the secondinterlayer insulating film 15 as the first signal line 41. Accordingly,it is possible to connect circuits, which are disposed on both sides ofthe first ground lines 42 a and 42 b, by the first and second signallines 47 and 48 with a shorter distance across the first ground lines 42a and 42 b without detouring. It should be noted that the first signalline 41 and the bridge ground lines 43 a and 43 b provide a coplanarwaveguide having a 3-strip structure.

[0030] The first ground lines 42 a and 42 b are used as grounds for themicrostrip line according to the second embodiment of the presentinvention instead of the ground planes generally used for microstriplines. The line width of the first ground lines 42 a and 42 b is greaterthan or equal to the line width w of the first signal line 41, and lessthan a value of (w+20*h). The line width of the first ground lines 42 aand 42 b is set so as to assure a return current of approximately 75% to95% for the microstrip line. Thus, fluctuations in electricalcharacteristics such as impedance of a transmission line are kept within10% of the characteristic impedance, allowing for the saving of wiringresources. Furthermore, when a total length of connecting sections withthe bridge ground lines 43 a and 43 b is less than 20% of the length ofthe first ground lines 42 a and 42 b, it is possible to controlfluctuations in the characteristic impedance along the length of thetransmission line within ±5%.

[0031] An example where the first ground lines 42 a and 42 b underliethe first signal line 41 has been illustrated in the second embodimentof the present invention. However, a first ground line may be in anupper layer, or a microstrip line may alternatively be sandwiched by thefirst ground lines in both the upper and lower layers.

[0032] Third Embodiment

[0033] A transmission line used in a semiconductor device according to athird embodiment of the present invention is characterized by using incombination a coplanar waveguide and a microstrip line described in thefirst and second embodiments. Since other elements are the same as inthe first and second embodiments, duplicate descriptions are omitted.

[0034] As shown in FIG. 5, the transmission line used in thesemiconductor device according to the third embodiment of the presentinvention is, for example, applied for clock signal lines in a logiccircuit and the like. To begin with, a clock signal is provided to aroute driver cell 60 from a clock signal source, and relayed to a routerelay buffer cell 61 from a route line 71, which is a first microstripline. The clock signal is further propagated from the route relay buffercell 61 to first relay buffer cells 62 a through 62 d from route branchlines 72 a through 72 d, which are second microstrip lines. The branchedclock signals are then further propagated from each of the first relaybuffer cells 62 a through 62 d to each of second relay buffer cells 64 athrough 64 p from relay buffer branch lines 74 a through 74 p, which arecoplanar waveguides.

[0035] When supplying a signal to many destinations, such as the clocksignal lines in a logic circuit and the like, buffer cells for relayingare inserted along the clock signal line so as to distribute the clocksignal. The coplanar waveguide according to the first embodiment of thepresent invention employs a structure of the signal lines and groundlines that are separated in thin lines and positioned in parallel, thusa parasitic capacitance increases and a line resistance also easilyincreases. Accordingly, the microstrip line according to the secondembodiment of the present invention is advantageous to send high-speedclock signals on a GHz level. However, the wiring resources cannot besufficiently acquired when the microstrip lines are heavily used.

[0036] In the semiconductor device according to the third embodiment ofthe present invention, as shown in FIG. 6 for example, a microstrip line104 is used in the region near the clock signal source where a signalline 107 a is sparsely located. On the other hand, a coplanar waveguide102 is used in the region where signal lines 107 b through 107 f arehighly dense at the clock signal supply destination. The microstrip line104 has a clock input buffer cell 100, which provides the clock signalto one end of a first signal line 141 in a first level. First groundlines 142 a and 142 b, which are located in a second level that facesthe first level, in which the first signal line 141 is located, areseparated, and bridge ground lines 143 a and 143 b are provided on thefirst level. The signal line 107 a is located under the bridge groundlines 143 a and 143 b.

[0037] Another end of the first signal line 141 is connected to a firstinput electrode 123 of the coplanar waveguide 102 through contact with arelay buffer cell 103. Furthermore, the first ground line 142 b isconnected to a second input electrode 124. Second signal lines 121 athrough 121 d and second ground lines 122 a through 122 e of thecoplanar waveguide 102 are formed on the first level. Accordingly,multiple signal interconnects 107 b through 107 f may be positionedunder the coplanar waveguide 102. The second signal lines 121 a through121 d and second ground lines 122 a through 122 e are connected atanother end on the opposite side of the microstrip line 104 to a firstoutput electrode 125 and a second output electrode 126. The first outputelectrode 125 is further connected to a clock output buffer cell 101,supplying the clock signal to other, nearby circuits.

[0038] According to the transmission lines of the semiconductor deviceof the third embodiment of the present invention, deterioration ofsignal propagation characteristics may be reduced and the wiringresource consumption may be reduced. Here, when the characteristicimpedance and the line resistance per unit length of the coplanarwaveguide according to the first embodiment are respectively designatedas Zc and Ro, the length of the coplanar waveguide may be determined soas to be less than a value of (2*Zc/Ro). The signals to be propagatedmay drastically attenuate, when the length of the coplanar waveguidebecome longer than the value of (2*Zc/Ro).

[0039] Other Embodiments

[0040] The present invention has been described as discussed above,however the descriptions and drawings that constitute a portion of thisdisclosure should not be perceived as limiting this invention. Variousalternative embodiments and operational techniques will become clear topersons skilled in the art from this disclosure

[0041] In the first through third embodiments of the present invention,an insulating film such as SiO₂ and the like has been illustrated as thefirst and the second interlayer insulating films 13, 15. However, aninsulating film such as a silicon nitride (Si₃N₄) film or an alumina(Al₂O₃) film, for example, may be used. Additionally, even withinterlayer insulating films having an wiring structure includingelectrical conducting layers such as polysilicon films, amorphoussilicon films, metal films or the like, the same results may beachieved.

[0042] Furthermore, the coplanar waveguide according to the firstembodiment of the present invention may be applied to a differentialsignal line. Namely, a pulse signal is provided to one end of thecoplanar waveguide, while a differential pulse signal is provided toanother end. Since the pulse signals of opposite polarity aretransmitted among adjacent lines, electromagnetic coupling is relativelystrengthened, making it more difficult to be affected by a noise due tocross talk from other wiring layers.

What is claimed is:
 1. A transmission line, comprising: a first inputelectrode located in a first level; a plurality of parallelstripe-shaped signal lines in the first level, one end of the signallines connected to the first input electrode; a first output electrodeconnected to another end of the signal lines, facing to the first inputelectrode; a second input electrode adjacent to the first inputelectrode in a second level facing the first level; a plurality ofstripe-shaped ground lines positioned alternately in between and atouter sides of each of the signal lines in the first level, one end ofthe ground lines connected to the second input electrode; and a secondoutput electrode adjacent to the first output electrode in the secondlevel and connected to another end of the ground lines.
 2. Thetransmission line of claim 1, wherein line widths of the signal linesand the ground lines are less than twice a line thickness of the signallines, and gap widths between the signal lines and the ground lines areless than the line thickness of the signal lines.
 3. A transmissionline, comprising: a first signal line located in a first level; a firstground line located in a second level facing the first level, the firstground line parallel to and facing the first signal line, and having aseparated section at least at one portion; and bridge ground lineslocated in the first level on both sides of the first signal lineoverlaying the separated section, and connected respectively to oneseparated end and another separated end of the first ground line.
 4. Thetransmission line of claim 3, wherein a line width of the first groundline is greater than a line width of the first signal line, and is lessthan a sum of the line width of the first signal line and a value oftwenty times an interlayer distance between the first signal line andthe first ground line.
 5. The transmission line of claim 3, wherein atotal length of the separated section of the first ground line is lessthan 20% of a length of the first signal line.
 6. The transmission lineof claim 3, further comprising: a first input electrode located in thefirst level and electrically connected to the first signal line; aplurality of stripe-shaped second signal lines in parallel in the firstlevel, one end of the second signal lines connected to the first inputelectrode; a first output electrode connected to another end of thesecond signal lines, facing the first input electrode; a second inputelectrode adjacent to the first input electrode in the second levelfacing the first level, and being electrically connected to the firstground line; a plurality of stripe-shaped second ground lines positionedalternately between and at outer sides of each of the second signallines in the first level, one end of the second ground lines connectedto the second input electrode; and a second output electrode adjacent tothe first output electrode in the second level and connected to anotherend of the second ground lines.
 7. The transmission line of claim 6,wherein in relation to a line thickness of the second signal lines, linewidths of the second signal lines and the second ground lines are lessthan twice the line thickness of the second signal lines, and gap widthsbetween the second signal lines and the second ground lines are lessthan the line thickness of the second signal lines.
 8. The transmissionline of claim 4, wherein a total length of the separated section of thefirst ground line is less than 20% of a length of the first signal line.9. The transmission line of claim 4, further comprising: a first inputelectrode located in the first level and electrically connected to thefirst signal line; a plurality of stripe-shaped second signal lines inparallel in the first level, one end of the second signal linesconnected to the first input electrode; a first output electrodeconnected to another end of the second signal lines, facing the firstinput electrode; a second input electrode adjacent to the first inputelectrode in the second level facing the first level, and beingelectrically connected to the first ground line; a plurality ofstripe-shaped second ground lines alternately between and at outer sidesof each of the second signal lines in the first level, one end of thesecond ground lines connected to the second input electrode; and asecond output electrode adjacent to the first output electrode in thesecond level and connected to another end of the second ground lines.10. The transmission line of claim 9, wherein in relation to a linethickness of the second signal lines, line widths of the second signallines and the second ground lines are less than twice the line thicknessof the second signal lines, and gap widths between the second signallines and the second ground lines are less than the line thickness ofthe second signal lines.
 11. The transmission line of claim 5, furthercomprising: a first input electrode located in the first level andelectrically connected to the first signal line; a plurality ofstripe-shaped second signal lines in parallel in the first level, oneend of the second signal lines connected to the first input electrode; afirst output electrode connected to another end of the second signallines, facing the first input electrode; a second input electrodeadjacent to the first input electrode in the second level facing thefirst level, and being electrically connected to the first ground line;a plurality of stripe-shaped second ground lines alternately between andat outer sides of each of the second signal lines in the first level,one end of the second ground lines connected to the second inputelectrode; and a second output electrode adjacent to the first outputelectrode in the second level and connected to another end of the secondground lines.
 12. The transmission line of claim 11, wherein in relationto a line thickness of the second signal lines, line widths of thesecond signal lines and the second ground lines are less than twice theline thickness of the second signal lines, and gap widths between thesecond signal lines and the second ground lines are less than the linethickness of the second signal lines.
 13. The transmission line of claim8, further comprising: a first input electrode located in the firstlevel and electrically connected to the first signal line; a pluralityof stripe-shaped second signal lines in parallel in the first level, oneend of the second signal lines connected to the first input electrode; afirst output electrode connected to another end of the second signallines, facing the first input electrode; a second input electrodeadjacent to the first input electrode in the second level facing thefirst level, and being electrically connected to the first ground line;a plurality of stripe-shaped second ground lines alternately between andat outer sides of each of the second signal lines in the first level,one end of the second ground lines connected to the second inputelectrode; and a second output electrode adjacent to the first outputelectrode in the second level and connected to another end of the secondground lines.
 14. The transmission line of claim 13, wherein in relationto a line thickness of the second signal lines, line widths of thesecond signal lines and the second ground lines are less than twice theline thickness of the second signal lines, and gap widths between thesecond signal lines and the second ground lines are less than the linethickness of the second signal lines.
 15. A semiconductor device,comprising: a route line having a first microstrip line configuration,being connecting a route driver cell to a route relay buffer cell, theroute driver cell receiving signals to be supplied to a terminalcircuit; a route branch line having a second microstrip lineconfiguration, being branched from the route relay buffer cell andconnected to a first relay buffer cell; and a relay branch line having acoplanar waveguide configuration, being branched from the first relaybuffer cell and connected to a second relay buffer cell for supplyingthe signals to the circuit.
 16. The semiconductor device of claim 15,wherein the first microstrip line configuration comprises: a firstsignal line located in a first level; a first ground line located in asecond level facing the first level, the first ground line in parallelto and facing the first signal line, and having a separated section atleast at one portion; and bridge ground lines located in the first levelon both sides of the first signal line overlaying the separated section,and connected respectively to one separated end and another separatedend of the first ground line.
 17. The semiconductor device of claim 15,wherein the second microstrip line configuration comprises: a firstsignal line located in a first level; a first ground line located in asecond level facing the first level, the first ground line in parallelto and facing the first signal line, and having a separated section atleast at one portion; and bridge ground lines located in the first levelon both sides of the first signal line overlaying the separated section,and connected respectively to one separated end and another separatedend of the first ground line.
 18. The semiconductor device of claim 15,wherein the coplanar waveguide configuration comprises: a first inputelectrode located in the first level and electrically connected to thefirst signal line; a plurality of stripe-shaped second signal lines inparallel in the first level, one end of the second signal linesconnected to the first input electrode; a first output electrodeconnected to another end of the second signal lines, facing the firstinput electrode; a second input electrode adjacent to the first inputelectrode in the second level facing the first level, and beingelectrically connected to the first ground line; a plurality ofstripe-shaped second ground lines alternately between and at outer sidesof each of the second signal lines in the first level, one end of thesecond ground lines connected to the second input electrode; and asecond output electrode adjacent to the first output electrode in thesecond level and connected to another end of the second ground lines.19. The semiconductor device of claim 18, wherein in relation to a linethickness of the second signal lines, line widths of the second signallines and the second ground lines are less than twice the line thicknessof the second signal lines, and gap widths between the second signallines and the second ground lines are less than the line thickness ofthe second signal lines.
 20. The semiconductor device of claim 16,wherein a line width of the first ground line is greater than a linewidth of the first signal line, and is less than a sum of the line widthof the first signal line and a value of twenty times an interlayerdistance between the first signal line and the first ground line. 21.The semiconductor device of claim 16, wherein a total length of theseparated section of the first ground line is less than 20% of a lengthof the first signal line.
 22. The semiconductor device of claim 16,wherein the coplanar waveguide configuration comprises: a first inputelectrode located in the first level and electrically connected to thefirst signal line; a plurality of stripe-shaped second signal lines inparallel in the first level, one end of the second signal linesconnected to the first input electrode; a first output electrodeconnected to another end of the second signal lines, facing the firstinput electrode; a second input electrode adjacent to the first inputelectrode in the second level facing the first level, and beingelectrically connected to the first ground line; a plurality ofstripe-shaped second ground lines alternately between and at outer sidesof each of the second signal lines in the first level, one end of thesecond ground lines connected to the second input electrode; and asecond output electrode adjacent to the first output electrode in thesecond level and connected to another end of the second ground lines.23. The semiconductor device of claim 22, wherein in relation to a linethickness of the second signal lines, line widths of the second signallines and the second ground lines are less than twice the line thicknessof the second signal lines, and gap widths between the second signallines and the second ground lines are less than the line thickness ofthe second signal lines.
 24. The semiconductor device of claim 20,wherein a total length of the separated section of the first ground lineis less than 20% of a length of the first signal line.
 25. Thesemiconductor device of claim 20, wherein the coplanar waveguideconfiguration comprises: a first input electrode located in the firstlevel and electrically connected to the first signal line; a pluralityof stripe-shaped second signal lines in parallel in the first level, oneend of the second signal lines connected to the first input electrode; afirst output electrode connected to another end of the second signallines, facing the first input electrode; a second input electrodeadjacent to the first input electrode in the second level facing thefirst level, and being electrically connected to the first ground line;a plurality of stripe-shaped second ground lines alternately between andat outer sides of each of the second signal lines in the first level,one end of the second ground lines connected to the second inputelectrode; and a second output electrode adjacent to the first outputelectrode in the second level and connected to another end of the secondground lines.
 26. The semiconductor device of claim 25, wherein inrelation to a line thickness of the second signal lines, line widths ofthe second signal lines and the second ground lines are less than twicethe line thickness of the second signal lines, and gap widths betweenthe second signal lines and the second ground lines are less than theline thickness of the second signal lines.
 27. The semiconductor deviceof claim 21, wherein the coplanar waveguide configuration comprises: afirst input electrode located in the first level and electricallyconnected to the first signal line; a plurality of stripe-shaped secondsignal lines in parallel in the first level, one end of the secondsignal lines connected to the first input electrode; a first outputelectrode connected to another end of the second signal lines, facingthe first input electrode; a second input electrode adjacent to thefirst input electrode in the second level facing the first level, andbeing electrically connected to the first ground line; a plurality ofstripe-shaped second ground lines alternately between and at outer sidesof each of the second signal lines in the first level, one end of thesecond ground lines connected to the second input electrode; and asecond output electrode adjacent to the first output electrode in thesecond level and connected to another end of the second ground lines.28. The semiconductor device of claim 27, wherein in relation to a linethickness of the second signal lines, line widths of the second signallines and the second ground lines are less than twice the line thicknessof the second signal lines, and gap widths between the second signallines and the second ground lines are less than the line thickness ofthe second signal lines.
 29. The semiconductor device of claim 24,wherein the coplanar waveguide configuration comprises: a first inputelectrode located in the first level and electrically connected to thefirst signal line; a plurality of stripe-shaped second signal lines inparallel in the first level, one end of the second signal linesconnected to the first input electrode; a first output electrodeconnected to another end of the second signal lines, facing the firstinput electrode; a second input electrode adjacent to the first inputelectrode in the second level facing the first level, and beingelectrically connected to the first ground line; a plurality ofstripe-shaped second ground lines alternately between and at outer sidesof each of the second signal lines in the first level, one end of thesecond ground lines connected to the second input electrode; and asecond output electrode adjacent to the first output electrode in thesecond level and connected to another end of the second ground lines.30. The semiconductor device of claim 29, wherein in relation to a linethickness of the second signal lines, line widths of the second signallines and the second ground lines are less than twice the line thicknessof the second signal lines, and gap widths between the second signallines and the second ground lines are less than the line thickness ofthe second signal lines.